File:Pedestal Encoder Interface FPGA Block Diagram.png
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Pedestal_Encoder_Interface_FPGA_Block_Diagram.png (576 × 357 pixels, file size: 18 KB, MIME type: image/png)
Block diagram of logic implemented on the Pedestal Encoder Interface Board's FPGA
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| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 18:05, 28 April 2009 | | 576 × 357 (18 KB) | Jgeorge (talk | contribs) | Block diagram of logic implemented on the Pedestal Encoder Interface Board's FPGA |
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